Microprocessor chips (e.g., integrated circuits or ICs) are manufactured to function at some published and guaranteed frequency and power. The frequency and power are usually measured after a final manufacturing step, i.e., the final metal level has been processed, at which point the completed configuration of the chips can either be divided up into different speed and power bins or discarded if found not to meet the requirements. The semiconductor industry currently uses several different speed-predicting metrics for speed sorting or screening.
It would be highly desirable to predict chip performance or power and the corresponding sorting (classification to a subset of a family of products by satisfying certain performance characteristics or specifications) in the early stages of manufacturing, i.e., before the end product is fully fabricated and tested for quality assurance.
More specifically, the microprocessor chips are being made within silicon wafers for which many chips are being processed at the same time. Normally the manufacturing process takes quite some time since it has to undergo many steps involving costly and complex machinery and labor.
It would be highly advantageous to screen out any defective chips (or wafers in general) as well as to project their corresponding performance as early as possible in the flow in order to make any necessary adjustments to the process in order to meet the demand.
While current prior art techniques often project final performance values to within 50-70% of final values while a new manufacturing process is ramping up, it would be advantageous to be able to project final wafer test values with much improved accuracy at this same stage in the development cycle.